Mcsi2 Interrupt Mapping - Texas Instruments OMAP5912 Reference Manual

Multimedia processor device overview and architecture

Hide thumbs Also See for OMAP5912:

Table of Contents

MCSI1 and MCSI2

MCSI2 Interface

Frame error (IRQ_11)

interrupt handler

interrupt handler

DSP peripheral

Clock generation

and management

MCSI2 Interrupt Mapping

Serial Interfaces

TX (DMA_REQ_3)

RX (DMA_REQ_4)

TX interrupt (IRQ_8)

RX interrupt (IRQ_9)

TX/RX/frame error

Interrupt (IRQ_17)

peripheral bus

Table 60 identifies the MCSI2 interrupts. MCSI2 generates level-2 interrupts

for both the DSP and the MPU. Only one MPU MCSI2 interrupt covers TX, RX,

and frame error conditions; software must check the MCSI2 status register to

determine the interrupt source.

Fsynch_out_z

Table of Contents