Big Endian (Be); Start Byte (Stb); Master/Slave Mode (Mst) - Texas Instruments OMAP5912 Reference Manual

Multimedia processor device overview and architecture
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Big Endian (BE)

Start Byte (STB)

Master/Slave Mode (MST)

SPRU760B
When this bit is 0 (default), the FIFO is accessed in little-endian format. In
transmit mode, the LSB (I2C_DATA [7:0]) is transmitted first, and the MSB
(I2C_DATA [15:8]) is transmitted in second position over the I
Conversely, in receive mode, the first, or odd, byte received (1,3, 5...) is stored
in the LSB position, and the second, or even, byte received is stored in the
MSB position.
When the LH sets this bit to a 1, the FIFO is accessed in big-endian format.
In transmit mode, the MS byte (I2C_DATA [15:8]) is transmitted first and the
LSB (I2C_DATA [7:0]) is transmitted in second position over the I
Conversely, in receive mode, the first, or odd, byte received (1,3, 5...) is stored
in the MS byte position, and the second, or even, byte received is stored in the
LSB position.
0: Little-endian mode
-
1: Big-endian mode
-
Value after reset is low.
Master mode only.
The local host sets the start-byte mode bit to 1 to configure the I
mode (I2C_SA = 00000001). See the Philips I
more details.
0: Normal mode
-
1: Start byte mode
-
Value after reset is low.
When this bit is cleared, the I
clock (SCL) is received from the master device.
When this bit is set, the I
the serial clock.
This bit is automatically cleared at the end of the transfer on a detected stop
condition and in case of arbitration lost.
0: Slave mode
-
1: Master mode
-
Value after reset is low.
2
C specification Version 2.1 for
2
C controller is in the slave mode and the serial
2
C controller is in the master mode and it generates
I2C Multimaster Peripheral
2
C line.
2
C line.
2
C in start byte
Serial Interfaces
79

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