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Encoder
Figure 64.
IrDA Encoder Mechanism
TXD
16XCLK
1
TXIR
Decoder
Figure 65.
IrDA Decoder Mechanism
RXIR
16XCLK
1
RXD
SPRU760B
Serial data from the transmit state machine is encoded to transmit data to the
optoelectronics. While the serial data input to the (TXD) is high, the output
(TXIR) is always low, and the counter used to form a pulse on TXIR is
continuously cleared. After TXD resets to 0, TXIR rises on the falling edge of
th
the 7
16XCLK. On the falling edge of the 10
creating a 3-clock-wide pulse. While TXD stays low, a pulse is transmitted
th
during the 7
to the 10
2
3
4
5
6
After reset, RXD is high and the 4-bit counter is cleared. When a rising edge
is detected on RXIR, RXD falls on the next rising edge of 16XCLK with
sufficient setup time. RXD stays low for 16 cycles (16XCLK) and then returns
to high as required by the IrDA specification. As long as no pulses (rising
edges) are detected on the RXIR, RXD remains high.
2
3
4
5
6
7
th
clocks of each 16-clock bit cycle.
7
8
9
10 11 12
8
9
10 11
12
th
16XCLK pulse, TXIR falls,
13 14
15
16
13 14
15
16
Serial Interfaces
UARTs
177
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