Power Modes; Deep Sleep Mode; Big Sleep Mode - Texas Instruments OMAP5912 Reference Manual

1.5

Power Modes

1.5.1

Deep Sleep Mode

1.5.2

Big Sleep Mode

SPRU753A
When SETUP_ANALOG_CELL3 underflows, all the analog cells must be
stable and the input system clock is released internally in ULPD.
The ULPD FSM1 can then move in big sleep or awake mode.
The ULPD handles three global power modes: deep sleep, big sleep, and
awake. The ULPD state machine, which is in charge of the wake-up/idle
handshake with OMAP3.2, manages the states of the system in each mode
and performs transitions between the modes.
In deep sleep mode, all internal clocks are inactive except the 32-kHz clock,
which is the ULPD state machine clock. In this mode ULPD_PLL is always
inactive.
In oscillator mode, the oscillator is disabled; therefore, the system input clock
is off, except when POWER_CTRL_REG [9] =0.
In external mode, the input system clock can be on or off; it is not controlled
by ULPD.
Note:
OSC12M_STOP output of ULPD is active high every time the state machine
is in a deep-sleep state. EXT_CLK_REQ is the same signal but with inverted
polarity.
OMAP5912 cannot go into deep−sleep while an emulator (JTAG) is
connected
In big sleep mode, the OMAP input clock is inactive, the 32-kHz clock is active,
and the system input clock is active in both oscillator and external modes.
This state is characterized by an external clock request to go active or
POWER_CTRL_REG [4] =0.
Ultralow-Power Device
Power Management 19