Control And Status Registers Description; Uart Irda Registers Mapping - Texas Instruments OMAP5912 Reference Manual

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Table 62. I/O Description (Continued)

Serial data input.

Serial data output.

Signal used to configure transceivers.

Control and Status Registers Description

Serial Interfaces

IrDA Signals (UART1 and UART3 only)

Each register is selected using a combination of address and some LCR

The local host can access the following registers at address = module base

address + address offset. The module base address is the module start

address. Register address offsets depend on the module address alignment

at the system top level. The address offsets (0x13 x S) and (0x18 x S to 0x31

x S (inclusive)) are reserved and must be read as 0x00 at all times.

S = 1 for 8-bit aligned addresses

2 for 16-bit aligned addresses

4 for 32-bit aligned addresses

All UART registers are 8-bit. Start addresses:

UART1: FFFB 0000

UART2: FFFB 0800

UART3: FFFB 9800

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