Table 55. EMIFS Multiplexing Control and MPU_BOOT Mode Signal Generation
for Reset Mode 0 (Continued)
DEVICE_TYPE
MPU_BOOT
Production
(sampled at
Emulation
reset)
Emulation
0
Emulation
0
Emulation
1
Emulation
1
4.2
Configuration of Interfaces in Internal Boot ROM
SPRU752B
GPIO1
Boot
(sampled
at reset)
0
Internal on
CS0
1
Internal on
CS0
0
External
on CS3
1
External
on CS3
Based on the value of the RESET_MODE pin at power-on reset, several
different configurations are supported by the internal boot ROM. Below, each
of the possible configurations is discussed.
The boot ROM modifies a number of different interfaces with the configuration
module
(FUNC_MUX_CTRL_(3−12),
PU_PD_SEL_(0−4) registers).
Depending on the boot ROM execution path, some pin multiplexing registers
are modified from their reset values (all zeros) to accommodate the relevant
interface(s). One or more of the following configurations may be implemented
by the boot ROM code.
Default EMIFS
EMIFS Protocol
Protocol
(after boot)
(at Boot)
Nonaddress/data
Nonaddress/data
multiplexed
multiplexed
Set by boot code software
(CONF_STATUS[3] = 0)
Nonaddress/data
Address/data multiplexed
multiplexed
Set by boot code software
(CONF_STATUS[3] = 1)
Nonaddress/data
Nonaddress/data
multiplexed
multiplexed
Set by hardware at reset
release from
CONF_STATUS[3] = 0
Address/data
Address/data multiplexed
multiplexed
Set by hardware at reset
release from
CONF_STATUS[3] = 1
PULL_DWN_CTRL_(0−4),
Initialization
Reset/Boot Overview
and
95