Uart Modes; Sir Mode - Texas Instruments OMAP5912 Reference Manual

Multimedia processor device overview and architecture

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UART Modes

UART Data Format

Serial Interfaces

The module performs serial-to-parallel conversion on received data

characters, and parallel-to-serial conversion on data characters the processor

transmits. The complete status of each channel of the module and each

received character/frame can be read at any time during functional operation

via the line status register (LSR).

The module can be placed in an alternate mode (FIFO mode), relieving the

processor of excessive software overhead by buffering received/transmitted

characters. Both the receiver and transmitter FIFOs store up to 64 bytes of

data (plus 3 additional bits of error status per byte for the receiver FIFO) and

have selectable trigger levels.

Both interrupts and DMA are available to control the data flow between the LH

and the module.

The UART uses a wired interface for serial communication with a remote

The module can use hardware or software flow control to manage

transmission/ reception. Hardware flow control uses the RTS output and CTS

input signals to automatically control serial data flow. This significantly reduces

software overhead and increases system efficiency. Software flow control

uses programmable XON/XOFF characters to automatically control data flow.

The UART modem module is enhanced with an autobauding functionality,

which, in control mode, allows for automatic setting of the speed, number of

bits per character, and parity.

5, 6, 7, or 8 bits of data according to LCR register

In slow infrared (SIR) mode, data transfer takes place between the LH and

peripheral devices at speeds up to 115200 bauds. A SIR transmit frame begins

with start flags (either a single 0xC0, multiple 0xC0, or a single 0xC0 preceded

by a number of 0xFF flags), followed by frame data, CRC−16, and ends with

a stop flag (0xC1).

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