Frame Format - Texas Instruments OMAP5912 Reference Manual

Frame Format

Figure 63. IrDA SIR Frame Format
SPRU760B
BLR[6] is used to select whether 0xC0 or 0xFF start patterns are to be used,
when multiple start flags are required.
The SIR transmit state machine attaches start flags, CRC−16, and stop flags.
It checks the outgoing data to determine whether data transparency is
required.
SIR transparency is carried out if the outgoing data, between the start and stop
flags, contains 0xC0, 0xC1, or 0x7D. If one of these is about to be transmitted,
the SIR state machine sends an escape character (0x7D) first, then inverts the
fifth bit of the real data to be sent, and sends this data immediately after the
0x7D character.
The SIR receive state machine recovers the receive clock, removes the start
flags, removes any transparency from the incoming data, and determines
frame boundary with reception of the stop flag. It also checks for errors such
as frame abort (0x7D character followed immediately by a 0xC1 stop flag,
without transparency), CRC error, and frame-length error. At the end of a
frame reception, the LH reads the line status register (LSR) to find possible
errors in the received frame.
The module can transfer data both ways, but when the device is transmitting,
hardware automatically disables the IR RX circuitry. Refer to Table 104,
Auxiliary Control Register Bit 5, for a description of the logical operation of all
three modes, SIR, MIR, and FIR.
The infrared output in SIR mode can be either 1.6 µs or 3/16 encoding,
selected by the PULSE_TYPE bit of the auxiliary control register (ACREG[7]).
In 1.6 µs encoding, the infrared pulse width is 1.6 µs, and in 3/16 encoding the
infrared pulse width is 3/16 of a bit duration (1/baud-rate).
The transmitting device must send at least 2 start flags at the start of each
frame for back-to-back frames. Reception supports variable-length stop bits.
XBOF BOF A
N*8 bits 8 bits 8 bits
The CRC is applied on the address (A), control (C), and information (I) bytes.
The two words of CRC are written in the FIFO in reception.
C I
8 bits M*8 bits
UARTs
CRC EOF
2*8 bits 8 bits
Serial Interfaces 175