Interrupts; Uart Mode Interrupts - Texas Instruments OMAP5912 Reference Manual

6.6.2

Interrupts

UART Mode Interrupts

Table 109. UART Mode Interrupts
Priority
Level
IIR[5−0]
0 0 0 0 0 1 None
0 0 0 1 1 0 1
0 0 1 1 0 0 2
0 0 0 1 0 0 2
0 0 0 0 1 0 3
0 0 0 0 0 0 4
SPRU760B
The UART/IrDA module generates interrupts on the UART_nIRQ output pin.
All interrupts are enabled/disabled by writing to the appropriate bit in the
interrupt enable register (IER). The interrupt status of the device can be
checked at any time by reading the interrupt identification register (IIR).
The UART and IrDA modes have different interrupts in the UART/IrDA module,
and therefore different IER and IIR mappings according to the selected mode.
The UART modes have seven possible interrupts. These interrupts are
prioritized to six different levels.
When an interrupt is generated, the interrupt identification register (IIR)
indicates that an interrupt is pending by bringing IIR[0] to 0, and provides the
type of interrupt through IIR[5−1]. It also summarizes the interrupt control
functions.
Interrupt Interrupt
Type Source
None None
Receiver line OE, FE, PE, or BI errors occur in
status characters in the RX FIFO
RX time-out Stale data in RX FIFO
RHR interrupt DRDY (data ready) (FIFO
disable)
RX FIFO above trigger level
(FIFO enable)
THR interrupt TFE (THR empty)
(FIFO disable)
TX FIFO below trigger level
(FIFO enable)
Modem status MSR[1:0] / = 0
UARTs
Interrupt Reset
Method
None
FE,PE,BI: Read RHR. OE:
Read LSR
Read RHR
Read RHR until interrupt
condition disappears
Write to THR until interrupt
condition disappears.
Read MSR
Serial Interfaces 181