Shared Peripherals - Texas Instruments OMAP5912 Reference Manual

Multimedia processor device overview and architecture

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Shared Peripherals

Peripherals Access

MPU/DSP Peripheral Access

The SSI and the GDD modules are on the L3-OCP2 port and thus are seen as part of memory port interface.

Peripheral Interconnects

Table 1 lists the following for each module:

On which bus the module resides

Whether a DMA can initiate a transaction to the peripheral

Whether the module can be accessed dynamically by each processor or

the corresponding static switch must be configured

L4 controller

L4 Controler

DSP private peripherals

Shared DSP peripherals

Dynamic shared

Semi-static shared

Shared MPU peripherals

MPU private peripherals

DSP End DSP TIPB

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