Ocp Interconnect - Texas Instruments OMAP5912 Reference Manual

Multimedia processor device overview and architecture
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Table 11.
DSP Peripherals Connected to the DSP Shared TIPB Bridge Instantiation
OMAP 5912
Peripheral
Interface
2 x MCSI
TIPB
2 x McBSP
Wrapper OCP
Table 12. DSP and MPU Shared Peripherals Instantiation
OMAP 5912
Peripheral
Interface
MMCSD/IO2
Static OCP
STI (reserved)
Dynamic OCP
32-kHz
Dynamic OCP
synchronizatio
n timer
4 x GPIO
Dynamic OCP
GPIO pin
Dynamic OCP
control
3 x UART
Static TIPB
McBSP
Static OCP
2
I
C
Static OCP
SPI
Static OCP
8 x GP timers
Static OCP
NAND flash
Static OCP
control
Static switch
TIPB
configuration
3

OCP Interconnect

SPRU758A
Address Bus
Address Bus
alignment
Byte
Byte
Address Bus
Address Bus
Alignment
Byte
Byte
Byte
Byte
Byte
Byte
Byte
Byte
Byte
Byte
Byte
Byte
The OCP, SSI interconnects, and static switches manage data transfers
between OMAP3.2 and the SSI or VLYNQ and USB peripherals.
The SSI is a full-duplex interface, using a synchronous serial interconnect
protocol (SSI). This protocol consists of a transmitter called (SST) in SSI,
which is in charge of transmitting information, and a receiver called (SSR),
which is in charge of receiving information
Instantiation
Access Size
Access Size
8b
16b
Data
16
R
16
R
Instantiation
Access Size
Access Size
Data
8b
16b
16
R
32
R
32
R
16
R
16
R
8
R
16
R
16
R
R
32
R
32
R
32
R
R
32
R
R
Peripheral Interconnects
OCP Interconnect
TIPB Router
32b
Shared DSP
Shared DSP
TIPB Router
32b
MPU
DSP
Shared
Shared
R
Private
Shared
R
Shared
Shared
R
Shared
Shared
R
Shared
Shared
Shared
Shared
Shared
Shared
Shared
Shared
R
Shared
Shared
R
Shared
Shared
R
Shared
Shared
R
Shared
Shared
37

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