Ulpd Power Modes Management; Introduction - Texas Instruments OMAP5912 Reference Manual

Table 50. Power Management Control Register
Field Description
MEMIPM Memory contoller internal clock power management.
MEMIPM = 1 Each internal memory controller clock is disabled when no access is pending
or active on that memory interface.
MEMIPM = 0. All memory controller clocks are disabled only when the EMIF is in the IDLE
or HOLD state.
CPUIPM CPU interface internal clock power management.
CPUIPM = 1 The internal clock driving the CPU/DMA pipeline registers and stall logic is
disabled when no request input is active, no request is pending, and no access is active in
the EMIF.
CPUIPM = 0 The internal clock driving the CPU/DMA pipeline registers and stall logic is
disabled only when the EMIF is in the IDLE or HOLD state.
MAINIPM Main internal clock power management.
MAINIPM = 1: The internal clock driving the arbitration, scheduler, external address, data
logic, and so on, is disabled when no request is pending and no access is active in the
EMIF.
MAINIPM = 0: The internal clock driving the arbitration, scheduler, external address, data
logic, and so on, is only disabled when the EMIF is in the IDLE or HOLD state.
SBSXPM SBSRAM external clock power management.
SBSXPM = 1: The SBSCLK_R clock is disabled by the SBSCEN bit whenever no SBSRAM
accesses are pending. The EMIF ensures that the memory device is clocked at least twice
before the access starts.
SBSRPM = 0: The SBSCLK_R clock is disabled only by the SBSCEN TIPB bit.
3.4

ULPD Power Modes Management

3.4.1

Introduction

SPRU753A
The ULPD is a power management module running at 32 kHz.
The ULPD has two main clock sources: a 32-kHz clock and a system clock of
medium frequency (12 MHz, 13 MHz, and 19.2 MHz).
The ULPD provides system reference used by all clock domains.
The ULPD internal state machine provides three system power modes:
awake, big sleep, and deep sleep. These three modes determine global clock
activity and overall consumption in OMAP5912.
Idle states are defined for each clock domain or subdomain.
Power Management User Services
Power Management 85