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Ultralow-Power Device
1.14
ULPD Output Clocks
34
Power Management
The ULPD controls the system clock (12 MHz or 19.2 MHz) and the various
48-MHz clocks used by OMAP5912 peripherals.
These clocks supply the OMAP3.2 subsystem and some of the OMAP5912
peripherals.
Figure 10 shows a simplified diagram of the ULPD clock generation scheme.
Most of the clocks generated by ULPD can be controlled independently by
hardware and by software. In fact, a hardware clock request signal and a
software clock request (programmable) bit in the SOFT_REQ_REG register
are associated with most of the ULPD-generated clocks.
These clock requests are used in the ULPD to enable/disable the associated
clocks.
In addition, the hardware request serves as a wake-up event for the ULPD
state machine and the clock generation module it controls (the oscillator and
ULPD_PLL).
The software requests are involved in the conditions of the awake to big sleep
transition.
SPRU753A
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