Ocp To Via Synchronous Bridge; Decode; Dma And Interrupt Formatter - Texas Instruments OMAP5912 Reference Manual

SSI Interconnect
4.3

OCP to VIA Synchronous Bridge

4.4

Decode

Table 14. SSI Address Spaces
SSI address space by GDD
SST address space
SSR address space
SSI address space by OMAP
SST address space
SSR address space
4.5

DMA and Interrupt Formatter

44 Peripheral Interconnects
OCP to the VIA synchronous bridge is a connection bridge between an OCP
bus and a VIA bus. This submodule is a target on the OCP bus and a master
on the VIA bus.
On the OCP part, this bridge provides only basic functionality signals plus
slave error.
This submodule decodes the address received from the OCP initiator. If the
current OCP command is for SSR or SST, the decode block forwards this
command to that block while keeping the other one inactive.
For SSI, the allocated address space begins at 0x30000000 and ends at
0x30000FFF, in case the address is generated by GDD directly. When the
address is provided by the GDD configuration port, the allocated address
space begins at 0x000 and ends at 0xFFF. If the address does not belong to
one of these two address spaces, SError is asserted. There are 4K bytes of
memory allocated for SSI, divided in the following mode: 2K bytes for SST and
2K bytes for SSR. For basic compatibility with the previous version of the chip,
the SST address space is assigned the lower address range, and the SSR
address space uses the higher addresses.
Start Address
0x3000_0000
0x3000_0000
0x3000_0800
0x000
0x000
0x800
The DMA and interrupt block formats status signals provided by SSR and SST
and generates interrupts and DMA requests.
When programming SSR or SST in interrupt mode, take care to avoid reading
the buffer before the interrupt signal is asserted.
End Address MAddrSpace
0x3000_0FFF 0000
0x3000_07FF 0000
0x3000_0FFF 0000
0xFFF 0001
0x7FF 0001
0xFFF 0001
Address Width
32 bits
32 bits
32 bits
12 bits
12 bits
12 bits
SPRU758A