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MicroWire Interface
3.2
Protocol Description
Figure 35.
Behavior of an X25C02 EEPROM Read Cycle
WIRE_NCS
UWIRE.SCLK
UWIRE.SDO
0
UWIRE.SDI
106
Serial Interfaces
Note:
You cannot use another CS in normal or DMA modes when a DMA mode is
active on one specific CS.
Note:
To use the µWire in DMA transmit mode, DMA_EN and AUTO_TX_EN must
be enabled, and IT_EN is best disabled. The AUTO_TX_EN can be active
when DMA_EN is disabled.
The serial port must be configured in order to use the setup registers.
This interface drives only one device at a given time. Therefore, the chip-select
of the selected device must be set to its active level before starting any read
or write process.
After loading the transmit data register (TDR), the write process is activated
by setting the START bit to 1 and by writing a value different from zero to the
NB_BITS_WR field.
A read process is always simultaneous with a write process, which means that
at every serial clock (SCLK) cycle, data is read. After having finished a write
process (if necessary), a number (defined by NB_BITS_RD) of SCLK cycles
is generated to allow storage of data from the serial input DI.
The transmitted data word is shifted out on the rising or falling edge of the serial
clock, according to the value of the *_EDGE_WR bits of the setup registers.
The received data word is shifted in on the falling or rising edge of the serial
clock, according to the value of the *_EDGE_RD bits of the setup registers.
When *_EDGE_WR and *_EDGE_RD bits have the same value, it is assumed
that the device behavior is the one shown in Figure 35. Otherwise, the required
behavior of the external device is as shown in Figure 36.
0
0
0
0
0
1
1
A7
On the DO line, data is generated from the µWire interface on SLCK falling
edge and read by the EEPROM interface on SCLK rising edge.
A6 A5 A4 A3 A2 A1 A0
D7
D6 D5 D4
D1 D0
SPRU760B
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