Figure 8.
Wake-up Sequence in Case of Warm Reset
CLK32K_IN
CK_REF
(Internal
system clock)
ULPD_STATE
Deep sleep or big sleep
CHIP_IDLE
(internal signal)
CHIP_WAKEUP
(internal signal)
MPU_RST
OMAP3.2 RESET
(internal signal)
1.12
Transitions From Big Sleep Mode
1.12.1
Transition From Big Sleep Mode to Deep Sleep Mode
SPRU753A
Three necessary conditions lead to deep sleep mode:
-
Wake-up request from OMAP is not active.
-
Peripherals clock request and software clock request are inactive.
Namely, every clock request that is in is not active.
-
POWER_CTRL_REG[4]=1
The transition follows this sequence:
1) All clock requests are inactive; there is no wake-up request from OMAP
and POWER_CTRL_REG[4]=1.
2) Input clocks to peripherals are globally disabled.
3) LOW_PWR is activate low and in oscillator mode the oscillator is also
disabled, unless POWER_CTRL_REG[9]=0.
4) FSM1 enters deep sleep mode.
Awake
sequence
30 CK_REF periods
Power Management
Ultralow-Power Device
Awake state
31