Linking Logical Channels - Texas Instruments OMAP5912 Reference Manual

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Linking Logical Channels

LCh Types Supporting This Feature

Software can configure DMA logical channels to an LCh chain.

To configure and start a linked LCh chain:

1) To link the LChs, configure the NEXTLCH_ID bit in the logical channel link

control register DMA_CLNK_CTRL to indicate the next logical channel to

be enabled as soon as the current logical channel has finished the

2) To define the LCh as being part of a linked queue, set the ENABLE_LNK

bit in the same register. In this way, the logical channel, defined by

NEXTLCH_ID, is enabled after the current channel finishes transferring.

3) Start the chain by enabling the first LCh in the chain (set the ENABLE bit

of the DMA_CCR register to 1).

In order to stop a linked chain, software can write to the STOP_LNK bit in

logical channel link control register to disable chain and queue. This must be

done to each LCh that is part of the chain. Writing to the STOP_LNK bit resets

both the ENABLE_LNK bit and the LCh enable bit in the DMA_CCR register.

If a linked chain is run to finish without being stopped, the whole chain remains

linked; that is, all LChs still have the ENABLE_LNK bit set to 1. To start the

same linked chain again, just enable the first LCh in the chain.

An LCh can be linked to all LCH 0 to 15 but not to/from the LCH-D. An LCh can

link to itself, and two LChs can link to each other. Linking several LCh in a

circular fashion is also possible.

ENABLE_LNK is disabled and hence the LCh is not part of the chain any

The restrictions on linking logical channels are:

Constraint 1:

It is the software's responsibility to make sure that all NEXTLCH_ID fields

and ENABLE_LNK bits are configured before the logical channel chain is

started (first LCh is enabled).

Undefined effects occur if the software modifies these fields when the

chain already is enabled.

Direct Memory Access (DMA) Support

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