Main Features - Texas Instruments OMAP5912 Reference Manual

Multimedia processor device overview and architecture

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Table of Contents

Functional Block Diagram

Data Exchanges

Main Features

Selectable UART/IrDA modes

Dual 64 entry FIFOs for received and transmitted data

Programmable and selectable transmit and receive FIFO trigger levels for

DMA and interrupt generation

Programmable sleep mode

Complete status reporting capabilities in both normal and sleep modes

Frequency prescaler values from 0 to 16383 to generate the appropriate

Single 48-MHz clock reference for baud setting

Two DMA requests and one interrupt request to the system

Clocks to all blocks

Serial Interfaces

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