Peripheral Register Addresses - Texas Instruments OMAP5912 Reference Manual

Multimedia processor device overview and architecture
Hide thumbs Also See for OMAP5912:
Table of Contents

Advertisement

3.10

Peripheral Register Addresses

SPRU750A
Table 11.
I/O Spaces (Continued)
Byte
19000
19400
19800
19C00
1A000
1A400
1A800
1B000
1B800
1C000
1C400
1C800
1CC00
1D000
1D400
1D800
1E400
1EC00
1F000
1F800
The DSP CPU and the DMA controller can access several classes of
peripheral devices:
-
DSP private peripherals
J
Three general-purpose timers
J
A watchdog timer
Name
GPIO3
UART3
GPIO4
(reserved)
32-kHz synchronization timer
OMAP5912 TIPB switch
GPTIMER8
GPIO1
GPIO2
Mailbox
DSP MPUI register
DSP Memory
Word
0C800
0CA00
0CC00
0CE00
0D000
0D200
0D400
0D800
0DC00
0E000
0E200
0E400
0E600
0E800
0EA00
0EC00
0F200
0F600
0F800
0FC00
DSP Subsystem
43

Advertisement

Table of Contents
loading

Table of Contents