Multichannel Serial Interfaces
Figure 40.
Transmit Interrupt Timing Diagram
CLK
Channel N-1
T7
T6
T5
TXD
IT_TX
t
< 2 x DSPXOR_CK (MHz)
(syn)
INTERRUPT_REG(7:4) = N
Frame Duration Error Interrupt
120
Serial Interfaces
T4
T3
T2
T1
T0
T7
t
(syn)
The frame duration error interrupt is only generated when:
The interface is configured in burst mode (CONTINUOUS = 0).
-
The frame duration is smaller or longer than the expected value.
-
Namely, expected frame duration = [(channels number) * (word size)] +
(over-size number) in clock periods units with over-size number defined in
OVER_SIZE_REG register.
If the frame duration is longer than the expected value, then the interrupt is
generated one clock period after the number of the over_size clock periods,
as defined in OVER_CLOCK parameter.
If the frame duration is smaller than the expected value, then the interrupt is
generated one clock period after the occurrence of the next frame pulse (first
active edge).
T6
T5
T4
T3
T2
T1
Channel N
DSP_WRITE(1) => STATUS_REG(4)
Channel N+1
T0
T7
T6
T5
T4
T3
t
(syn)
SPRU760B
T2
T1
T0