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Ultralow-Power Device
1.2
Overview
16
Power Management
The ULPD is a power management module running at 32 kHz (CLK32K).
The ULPD employs three global-system power modes: awake mode, big
sleep mode, and deep sleep mode. See Section 1.5, Power Modes, for a
description of these modes and the transitions between them.
The ULPD controls the various module clocks with several input clock sources
provided by the oscillator and by the OMAP3.2 DPLL and the 96-MHz analog
phase-locked loop (APLL). It also can sequence the wake-up of the system
properly by enabling various analog cells successively. Analog cells are
on-chip or external modules that are involved in the generation of the device
input clock or supply voltage. Typical analog cells are on-chip oscillators or
external supply voltage regulators. ULPD can manage up to six analog cells
Figure 1.
SPRU753A
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