Fir Mode; Functional Description; Trigger Levels - Texas Instruments OMAP5912 Reference Manual

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FIR Mode

FIR Transmit Frame Format

Serial Interfaces

When the SIP_MODE bit of mode definition register 1 = 1 (MDR1[6]), the TX

state machine always sends 1 SIP at the end of a transmission frame. But

when MDR1[6] = 0, the transmission of the SIP depends on the SEND_SIP bit

of the auxiliary control register (ACREG[3]). The local host can set ACREG[3]

at least once every 500 ms. The advantage of this approach over the default

is that the TX state machine does not need to send the SIP at the end of each

frame, which may reduce the overhead required.

In fast infrared mode (FIR), data transfer takes place between the LH and

peripheral devices at 4M bits/s. A FIR transmit frame starts with a preamble,

followed by a start flag, frame data, CRC−32, and ends with a stop flag.

On transmit, the FIR transmit state machine attaches the preamble, start flag,

CRC−32, and stop flag. It also encodes the transmit data into 4PPM format and

generates the serial infrared interaction pulse (SIP).

On receive, the FIR receive state machine recovers the receive clock,

removes the start flag, decodes the 4PPM incoming data, and determines the

frame boundary with reception of the stop flag. It also checks for errors such

as illegal symbol, CRC error, and frame-length error. At the end of a frame

reception, the LH reads the line status register (LSR) to discover possible

errors in the received frame.

The module transfers data both ways, but when the device is transmitting,

hardware automatically disables the IR RX circuitry. Refer to Table 104,

Auxiliary Control Register Bit 5, for a description of the logical operation for all

three modes, SIR, MIR, and FIR.

The UART provides programmable trigger levels for both receiver and

transmitter DMA and interrupt generation. After reset, both transmitter and

receiver FIFOs are disabled, so in effect the trigger level is the default value

of 1 byte. The programmable trigger levels are an enhanced feature available

via the trigger level register (TLR).

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