Data Packing And Bursting - Texas Instruments OMAP5912 Reference Manual

Multimedia processor device overview and architecture

Hide thumbs Also See for OMAP5912:

Table of Contents

Data Packing and Bursting

For all addressing modes, independent element and frame indexing were

not supported for OMAP 3.0 and 3.1. The EI and FI configuration is depen-

dent on the OMAP3_1_Compatible_Disable bit in the DMA_CCR register.

If DMA_CCR[OMAP3_1_Compatible_Disable]= 0:

EI(source) = EI(destination) = DMA_CSEI register

FI(source) = FI(destination) = DMA_CSFI register

If DMA_CCR[OMAP3_1_Compatible_Disable] = 1:

EI(source) = DMA_CSEI register

EI(destination) = DMA_CDEI register

FI(source) = DMA_CSFI register

FI(destination) = DMA_CDFI register

LCh Types Supporting this Feature

A DMA channel has the capacity to:

Pack several consecutive byte accesses in a single word16 or word32

access. This increases the transfer rate. For a channel, the decision to

pack to its source port is dependent on the source port access capability

and whether source packing is enabled by software. The same goes for

the destination port. Software can control packing for both destination and

source with the bits SRC_PACK and DST_PACK in the DMA channel

source destination parameters register (DMA_CSDP).

Split a single access, defined by its DMA Port capability, into subset

access size if the address of single access is not aligned on access size.

For example:

Split a word16 transfer into several byte accesses, if access address

is not aligned on word16 address.

Split a word32 access into single word accesses, if access address is

not aligned on word32 boundary.

Split 4x32-bit burst access into several byte/word/double-word

accesses, if access address is not aligned on 4x32-bit burst access

Direct Memory Access (DMA) Support

Table of Contents