Mpui Access Configurations - Texas Instruments OMAP5912 Reference Manual

Multimedia processor device overview and architecture
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DSP DMA
Figure 17.
Registers for Controlling Channel Context
Configuration registers
(programmed by code)
DMA_CSDP
DMA_CCR
DMA_CICR
DMA_CSR
DMA_CSSA_L
DMA_CSSA_U
DMA_CDSA_L
DMA_CDSA_U
DMA_CEN
DMA_CFN
DMA_CSFI
DMA_CSEI
4.3

MPUI Access Configurations

128
Direct Memory Access (DMA) Support
Figure 17 shows the registers for controlling channel context.
Automatically copied
when channel enabled
and between block transfers
in autoinitialization mode
As shown in Figure 18, the MPUI_EXCL bit in DMA_GCR determines the
relationship
between
MPUI_EXCL = 0, the MPUI shares memory with the channels. When
MPUI_EXCL = 1 , the MPUI cannot access external memory, but it can access
internal RAM without interruptions from the channels. When MPUI_EXCL = 1,
the DARAM port and the SARAM port operate as if all the channels were
disconnected from the service chain. See Section 4.4, Service Chain.
Working registers
(used by DMA controller)
DMA_CSDP copy
DMA_CCR copy
DMA_CICR copy
DMA_CSR copy
DMA_CSSA_L copy
DMA_CSSA_U copy
DMA_CDSA_L copy
DMA_CDSA_U copy
DMA_CEN copy
DMA_CFN copy
DMA_CDFI copy
DMA_CDEI copy
the
MPUI
and
the
DMA
channels.
When
SPRU755B

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