1.11.2
Transition from Deep Sleep to Awake Mode
SPRU753A
b) Oscillator
mode:
SETUP_ANALOG_CELL2, is loaded with the related setup value
from the ULPD register that corresponds to the maximum time
between ramp-up time of the external voltage supply and LDO
stabilization time.
When the counter underflow is generated, it enables the oscillator.
Then the setup counter, SETUP_ANALOG_CELL3, is loaded with the
related setup value from the ULPD register that corresponds to the
stabilization delay of the oscillator.
When the counter underflow is generated, it globally enables the system
input clock to peripherals.
The clocks for the peripherals are restarted if the corresponding clock
request is active. These two setup stages allow the supply voltage and the
input system clock to be stable before enabling the input clock to peripher-
als.
4) FSM1 enters big sleep mode.
Transition to awake mode occurs whenever a wake-up event occurs. Wake-up
events are:
-
MPU_RST
-
OMAP3.2 asserts the wake-up request. A wake-up request is initiated by
peripheral unmasked interrupts.
-
UART2 requests system clock.
-
PWRON_RESET
-
RTC_ON_NOFF
-
32-kHz watchdog reset
In
this
case,
the
Power Management
Ultralow-Power Device
setup
counter,
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