Double-Indexed Addressing Mode - Texas Instruments OMAP5912 Reference Manual

Double-Indexed Addressing Mode

SPRU755B
Address is incremented by element size and a frame index if the end of the
current frame is reached. Address is incremented by element size and an
element index if the end of the current element is reached but the end of frame
is not reached.
When not at end of a frame or transfer, that is, as long as element counter ≠
0:
A(n+1) = A(n) + ES + (EI – 1)
When at end of a frame but not at the end of the transfer, that is, as long as
element counter = 0 and frame counter ≠ 0:
A(n+1) = A(n) + ES + (FI – 1)
Calculate element and frame index as follows:
EI = ((Stride EI – 1) * ES) + 1
FI = ((Stride FI – 1) * ES) + 1
where:
A(n): Byte address of the element n within the transfer.
ES: Element size in bytes, ES ∈ {1, 2, 4}.
EI: Element index in bytes, specified in a configuration register, -32768 ≤
EI ≤ 32767.
Stride EI: Number of elements between the beginning of current element,
n, to the beginning of next element, n+1.
Element: Counter that is (re)initiated with the number of element per frame
or per transfer. Decreased by 1 for each element transferred. Initial value
is configured in register DMA channel element number, DMA_CEN.
Fl: Frame index in bytes, specified in a configuration register, - 32768 ≤ FI ≤
32767.
Stride FI: Number of elements between the beginning of last element of
the current element and the beginning of first element of the next frame.
Frame counter: Counter that is (re)initiated with the number of frames per
transfer. Decreased by 1 for each frame transferred. Initial value is config-
ured in register DMA channel frame number, DMA_CFN.
Note:
FI = 1 provides consecutive element accesses at end of frames. If EI = 1, the
behavior is the same as with the post incremented addressing mode.
Direct Memory Access (DMA) Support
System DMA
49