Logical Channel Scheduling Scheme; Logical Channel Priorities - Texas Instruments OMAP5912 Reference Manual

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Logical Channel Scheduling Scheme

Each physical channel can only serve one logical channel at a time. If several

logical channels are active and waiting to be served, they are interleaved

based on an arbitration scheme in a TDMA manner. The supported arbitration

schemes are:

Round robin scheduling

Fixed scheduling from low LCH ID to high LCH ID

The scheme to be used can be controlled by software on a global basis.

In the global control register, (DMA_GCR), the ROUND_ROBIN_DISABLE bit

controls which scheme to follow. This bit can only be changed when the DMA

is quiescent (that is, when no LChs are enabled). Any change of this bit when

a LCh is enabled causes undefined behaviors.

LCh Types Supporting this Feature

Each logical channel can be given a low or high priority level. When a DMA

physical channel receives requests from several logical channels, it looks at

their priorities. The physical channel assignment to logical channels follow the

scheme described below:

1) Requests from high-priority logical channels are served first. A higher

priority logical channel can preempt the current on-going low-priority

logical transfer and start the higher priority logical channel transferring.

The preempted logical channel continues the transfer as soon as all

high-priority channels are served. A transfer can be preempted on

element boundary. See section 3.1.9, Logical Channel Preempting, for

more information on channel preempting.

2) Requests from low-priority logical channels are served only if there are no

requests from high-priority logical channels. This can occur if no

high-priority logical channels are activated, or if the high-priority logical

channels are waiting for a synchronization event.

3) Requests of the same priority level are served in a round robin or fixed

scheduling scheme, as mentioned earlier in this document.

Use the PRIO bit in the logical channel register DMA_CCR to configure the

LCh priority.

Direct Memory Access (DMA) Support

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