Rng Clocks; Total Rng Shutdown - Texas Instruments OMAP5912 Reference Manual

Power Management User Services
3.2.4

RNG CLOCKS

Total RNG Shutdown

80 Power Management
The RNG module is divided into four principal blocks:
-
RING oscillators
-
RNG generator
-
State machine
-
Output and input registers
The random numbers are accessible to the application in a 32-bit read-only
register (RNG_OUT). Once the register is read, the RNG module immediately
generates a new value. If no RNG read is performed, the RNG module goes
idle (IDLERNG) after a maximum of 2
In this state the ring oscillators and RNG generator are completely stopped,
while only the internal state machine stays active, clocked by the input system
clock.
There are three ways to reduce RNG module consumption:
-
Total RNG shutdown (automatic)
-
Partial RNG shutdown
-
Total RNG shutdown (reset RNG)
The best and safest way to go into sleep mode is to stop reading the last
generated random number. After a maximum of 2
the state machine is in its IDLERNG state. This requires that the input clock
be present so that the state machine can jump to its different state. At this state,
the rings and the 24-bit counter are off (if bit 0 of RNG_MASK is 1). The RNG
can be kept in this state indefinitely and as soon as a random number is read,
the state machine wakes up. When the state machine is in its IDLERNG state,
a signal at the boundary goes low, indicating that the input clock can be cut off.
There is no need to perform a soft reset.
The counter, being synchronous with a clock derived from the input system
clock, is still incrementing if the autoidle bit of the module is not set by writing
1 in the bit 0 of the RNG_MASK register (offset address 0x40).
Because all RNG activities are shut off, this is the best method for RNG power
consumption reduction. It takes a maximum of 2
IDLERNG state where the RNG oscillator is shut off.
The input clock can be restarted anytime and no reset is required to restart
RNG module.
24
cycles of the input system clock.
24
cycles of the input clock,
24
cycles to reach the
SPRU753A