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I2C Multimaster Peripheral
2
Table 28. I
C Configuration Register(I2C_CON)
Bit
Name
15
I2C_EN
14
BE
13:12
−
11
STB
10
MST
9
TRX
8
XA
7:2
−
1
STP
0
STT
2
I
C Module Enable (I2C_EN)
78
Serial Interfaces
Description
2
I
C module enable
Big endian mode
Reserved
Start byte mode (master mode only)
Master/slave mode
Transmitter/Receiver mode (master mode only)
Expand address
Reserved
Stop condition (master mode only)
Start condition (master mode only)
Active Transfer Phase
During an active transfer phase (STT has been set to 1), no modification
must be done in this register. Changing it may result in an unpredictable
behavior.
When this bit is set to 0, the I
the receive and transmit FIFOs are cleared and all status bits are set to their
default values. None of the configuration registers (I2C_IE, I2C_BUF,
I2C_CNT, I2C_CON, I2C_OA, I2C_SA, I2C_PSC, I2C_SCLL and I2C_SCLH)
are reset, all keep their initial values, and all can be accessed. The LH must
set this bit to 1 for normal operation.
2
0: I
C controller in reset
-
2
1: I
C module enabled
-
Value after reset is low.
2
C controller is not enabled and reset. When 0,
SPRU760B
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