Single-Indexed Addressing Mode; Post-Incremented Addressing Mode Memory Accesses - Texas Instruments OMAP5912 Reference Manual

Figure 6.

Post-Incremented Addressing Mode Memory Accesses

Frame m
Frame m+1

Single-Indexed Addressing Mode

SPRU755B
Element n
Element n+1
Element n+2
Element n+3
Address is post-incremented by element size and an element index
(expressed in bytes).
A(n+1) = A(n) + ES + (EI – 1)
EI = ((Stride EI – 1) * ES) + 1
where:
A(n): Byte address of the element n within the transfer.
ES: Element size in bytes, ES ∈ {1, 2, 4}.
EI: Element index in bytes, specified in a configuration register, -32768 ≤
EI ≤ 32767.
Stride EI: Number of elements between the beginning of current element,
n, to the beginning of next element, n+1.
Note:
EI = 1 results in consecutive element accesses (the same behavior as with
the post-incremented addressing mode).
Memory
Byte @ addr 00
Byte @ 01
Byte @ 02
Byte @ 03
Byte @ 04
Byte @ 05
Byte @ 06
Byte @ 07
Byte @ 08
Byte @ 09
Byte @ 0A
Byte @ 0B
Byte @ 0C
Byte @ 0D
Byte @ 0E
Byte @ 0F
Byte @ 10
Byte @ 11
Direct Memory Access (DMA) Support
System DMA
Element size (can be 1, 2, 4)
Block (full data transfer, BSi)
Frame size
47