Addressing Modes - Texas Instruments OMAP5912 Reference Manual

4.9.1

Addressing Modes

Figure 23. Memory Representation
Element n
Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç
Frame n
Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç
Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç
Element n+1
Ì Ì Ì Ì Ì Ì Ì Ì Ì Ì
Ì Ì Ì Ì Ì Ì Ì Ì Ì Ì
Ì Ì Ì Ì Ì Ì Ì Ì Ì Ì
Ì Ì Ì Ì Ì Ì Ì Ì Ì Ì
Ì Ì Ì Ì Ì Ì Ì Ì Ì Ì
Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç
Frame n+1
Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç
SPRU755B
Figure 23 illustrates the address index management.
byte @address 00
byte @ 01
byte @ 02
byte @ 03
byte @ 04
byte @ 05
byte @ 06
byte @ 07
byte @ 08
byte @ 09
byte @ 0A
byte @ 0B
byte @ 0C
byte @ 0D
byte @ 0E
byte @ 0F
byte @ 10
byte @ 11
byte @ 12
byte @ 13
byte @ 14
byte @ 15
byte @ 16
byte @ 17
Memory
An addressing mode is an address computation algorithm a DMA channel can
use to determine where to access data. The system DMA has four addressing
modes: constant, post-incremented, indexed, and double-indexed.
The amount of data (block size) to transfer is programmed in bytes. This size
can be odd or even. The start address for a transfer is a byte address and can
be odd (not word-aligned). The data block to transfer is split into frames and
elements.
Block (full data transferred) (4 segments)
Element size
(Can be 1, 2, 4)
Element index (must be seen as @ increment)
(Can be different to element size)
(Here: EI = 3 but index size is 2 bytes)
Frame index (must be seen as @ increment)
(Can be different to frame size)
(Here: FI = 5 but index size is 4 bytes)
Direct Memory Access (DMA) Support
DSP DMA
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