Stop Condition (Stp); Start Condition (Stt) - Texas Instruments OMAP5912 Reference Manual

Stop Condition (STP)

Start Condition (STT)

Table 30. STT Register Values
2
Table 31. I C Own Address Register(I2C_OA)
Bit Name
15:10 −
9:0 OA
SPRU760B
Master mode only.
The local host is able to set this bit to a 1 to generate a stop condition. The
hardware resets it to 0 after the stop condition has been generated. The stop
condition is generated when DCOUNT passes 0.
When this bit is not set to 1 before the end of the transfer (DCOUNT = 0), the
stop condition is not generated and the SCL line is held to 0 by the master,
which can restart a new transfer by setting the STT bit to 1.
0: No action or stop condition detected
-
1: Stop condition queried
-
Value after reset is low.
Master mode only.
The local host is able to set this bit to a 1 to generate a start condition. The
hardware resets it to 0 after the start condition has been generated. The
start/stop bits can be configured to generate different transfer formats.
0: No action or start condition generated
-
1: Start
-
Value after reset is low.
STT STP Conditions
1 0 Start
0 1 Stop
1 1 Start−Stop (DCOUNT = n)
1 0 Start (DCOUNT = n)
DCOUNT is the data count value in the I2C_CNT register.
Description
Reserved
Own address
This register specifies the module I
I2C Multimaster Peripheral
Bus Activities
S−A−D
P
S−A−D..(n)..D−P
S−A−D..(n)..D
2
C 7-bit or 10-bit address (own address).
Serial Interfaces 81