Hardware Nand Flash Controller - Texas Instruments OMAP5912 Reference Manual

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Memory Interfaces for the EMIFS

Hardware NAND Flash Controller

Memory Interfaces

16−bit NAND flash—controlled by EMIFS directly (software NAND flash

CompactFlash—controlled by the compact flash controller (CFC)

Some of these controllers can be used simultaneously. See Figure 23,

Figure 24, and Figure 25 for details on simultaneous connections of these

memory types. The different combinations are:

Address/Data multiplexed NOR on EMIFS and 8-bit NAND on NFC

Non-multiplexed NOR on EMIFS and 16−bit NAND on EMIFS

Non-multiplexed NOR on EMIFS and CFC

The following sections describe the different external memory controllers that

use the EMIFS pins.

The NAND flash controller (NFC) is the interface between the host processor

and the external NAND flash memory core (NFMC). The NFC (see Figure 1)

supports the following NFMC configurations:

Only 8-bit bus widths are supported. See Figure 1 for an overview of the

NAND flash controller.

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