Single-Indexed Addressing Mode Memory Accesses - Texas Instruments OMAP5912 Reference Manual

System DMA
Figure 7.

Single-Indexed Addressing Mode Memory Accesses

Element n
Frame m
Element n+1
Element n+2
Frame m+1
Element n+3
Note: EI used between frames for single-indexed addressing mode. This is why this figure has three equal, big strides between
the elements.
48 Direct Memory Access (DMA) Support
Figure 7 illustrates how the memory accesses are performed if a LCh is
configured with single indexed addressing mode and:
Starting address: 00
-
Element size: 2 (16 bits)
-
Element number: 2
-
Element index: 3
-
Frame number: 2
-
Frame index: Ignored
-
Memory
Byte @ addr 00
Byte @ 01
Byte @ 02
Byte @ 03
Byte @ 04
Byte @ 05
Byte @ 06
Byte @ 07
Byte @ 08
Byte @ 09
Byte @ 0A
Byte @ 0B
Byte @ 0C
Byte @ 0D
Byte @ 0E
Byte @ 0F
Byte @ 10
Byte @ 11
Element size (can be 1, 2, 4)
Element Index (must be seen as @
increment)
(El = 3, size = 2)
Index size can be different from
element size.
Block (full data transfer, BSi)
Stride EI = 2 elements.
SPRU755B