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1 TMS320DM355 Digital Media System-on-Chip (DMSoC)
1.1 Features
High-Performance Digital Media
System-on-Chip
– 216- and 270-MHz ARM926EJ-S Clock Rate
– Fully Software-Compatible With ARM9
ARM926EJ-S Core
– Support for 32-Bit and 16-Bit (Thumb Mode)
Instruction Sets
– DSP Instruction Extensions and Single
Cycle MAC
– ARM Jazelle Technology
– EmbeddedICE-RT Logic for Real-Time
Debug
ARM9 Memory Architecture
– 16K-Byte Instruction Cache
– 8K-Byte Data Cache
– 32K-Byte RAM
– 8K-Byte ROM
– Little Endian
Video Processing Subsystem
– Front End Provides:
Hardware IPIPE for Real-Time Image
Processing
CCD and CMOS Imager Interface
14-Bit Parallel AFE (Analog Front End)
Interface Up to 67.5 MHz
Glueless Interface to Common Video
Decoders
BT.601/BT.656 Digital YCbCr 4:2:2
(8-/16-Bit) Interface
Histogram Module
Resize Engine
– Resize Images From 1/16x to 8x
– Separate Horizontal/Vertical Control
– Two Simultaneous Output Paths
– Back End Provides:
Hardware On-Screen Display (OSD)
Composite NTSC/PAL video encoder
output
8-/16-bit YCC and Up to 18-Bit RGB666
Digital Output
BT.601/BT.656 Digital YCbCr 4:2:2
(8-/16-Bit) Interface
Supports digital HDTV (720p/1080i)
output for connection to external
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Instruments semiconductor products and disclaimers thereto appears at the end of this document.
2
I
C-bus is a trademark of Texas Instruments.
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All other trademarks are the property of their respective owners.
PRODUCT PREVIEW information concerns products in the
formative or design phase of development. Characteristic data and
other specifications are design goals. Texas Instruments reserves
the right to change or discontinue these products without notice.
Digital Media System-on-Chip (DMSoC)
SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007
encoder
External Memory Interfaces (EMIFs)
– DDR2 and mDDR SDRAM 16-bit wide EMIF
With 256 MByte Address Space (1.8-V I/O)
– Asynchronous16-/8-bit Wide EMIF (AEMIF)
Flash Memory Interfaces
– NAND (8-/16-bit Wide Data)
– OneNAND(16-bit Wide Data)
Flash Card Interfaces
– Two Multimedia Card (MMC) / Secure
Digital (SD/SDIO)
– SmartMedia
Enhanced Direct-Memory-Access (EDMA)
Controller (64 Independent Channels)
USB Port with Integrated 2.0 High-Speed PHY
that Supports
– USB 2.0 Full and High-Speed Device
– USB 2.0 Low, Full, and High-Speed Host
Three 64-Bit General-Purpose Timers (each
configurable as two 32-bit timers)
One 64-Bit Watch Dog Timer
Three UARTs (One fast UART with RTS and
CTS Flow Control)
Three Serial Port Interfaces (SPI) each with
two Chip-Selects
One Master/Slave Inter-Integrated Circuit
2
(I
C) Bus™
Two Audio Serial Port (ASP)
– I2S and TDM I2S
– AC97 Audio Codec Interface
– S/PDIF via Software
– Standard Voice Codec Interface (AIC12)
– SPI Protocol (Master Mode Only)
Four Pulse Width Modulator (PWM) Outputs
Four RTO (Real Time Out) Outputs
Up to 104 General-Purpose I/O (GPIO) Pins
(Multiplexed with Other Device Functions)
On-Chip ARM ROM Bootloader (RBL) to Boot
From NAND Flash, MMC/SD, or UART
Configurable Power-Saving Modes
Crystal or External Clock Input (typically
24 MHz or 36 MHz)
Flexible PLL Clock Generators
Debug Interface Support
Copyright © 2007–2007, Texas Instruments Incorporated
TMS320DM355
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