ST STM32WL55JC Reference Manual page 1068

Inter-integrated circuit (I2C) interface
Figure 284. Transfer bus diagrams for I2C slave transmitter
Example I2C slave transmitter 3 bytes with 1st data flushed,
NOSTRETCH=0:
TXE
EV1: ADDR ISR: check ADDCODE and DIR, set TXE, set ADDRCF
EV2: TXIS ISR: wr data1
EV3: TXIS ISR: wr data2
EV4: TXIS ISR: wr data3
EV5: TXIS ISR: wr data4 (not sent)
Example I2C slave transmitter 3 bytes without 1st data flush,
NOSTRETCH=0:
TXE
EV1: ADDR ISR: check ADDCODE and DIR, set ADDRCF
EV2: TXIS ISR: wr data2
EV3: TXIS ISR: wr data3
EV4: TXIS ISR: wr data4 (not sent)
Example I2C slave transmitter 3 bytes, NOSTRETCH=1:
EV1
TXE
EV1: wr data1
EV2: TXIS ISR: wr data2
EV3: TXIS ISR: wr data3
EV4: TXIS ISR: wr data4 (not sent)
EV5: STOPF ISR: (optional: set TXE and TXIS), set STOPCF
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ADDR TXIS TXIS
S Address A
data1
EV2
EV1 EV3
ADDR TXIS
S Address A data1
EV2
EV1
TXIS
S Address data1
A
EV2
TXIS TXIS
A A
data2
EV4 EV5
TXIS TXIS
A data2 A data3
EV3 EV4
TXIS
TXIS
A data2 A data3
EV3 EV4
RM0453 Rev 2
legend:
data3
NA P
legend :
NA P
legend:
STOPF
NA P
EV5
RM0453
transmission
reception
SCL stretch
transmission
reception
SCL stretch
transmission
reception
SCL stretch
MS19853V2