Figure 283. Transfer Sequence Flow For I2C Slave Transmitter, Nostretch = 0 - ST STM32WL55JC Reference Manual

Advanced arm-based 32-bit mcus with sub-ghz radio solution
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RM0453
Slave receiver
RXNE is set in I2C_ISR when the I2C_RXDR is full, and generates an interrupt if RXIE is
set in I2C_CR1. RXNE is cleared when I2C_RXDR is read.
When a STOP is received and STOPIE is set in I2C_CR1, STOPF is set in I2C_ISR and an
interrupt is generated.
Figure 285. Transfer sequence flowchart for slave receiver with NOSTRETCH=0
Inter-integrated circuit (I2C) interface
Slave reception
Slave initialization
No
I2C_ISR.ADDR
=1?
Yes
Read ADDCODE and DIR in I2C_ISR
Set I2C_ICR.ADDRCF
I2C_ISR.RXNE
=1?
Yes
Write I2C_RXDR.RXDATA
RM0453 Rev 2
SCL
stretched
No
MS19855V2
1069/1454
1117

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