General Design Considerations - Intel Quark D2000 Design Manual

4.
5.
4.2.1

General Design Considerations

The maximum bus capacitive load for each I²C bus is 400 pF. The pull-up resistor
cannot be made so large that the bus time constant (Resistance X Capacitance) does
not meet the I²C rise and fall time specification.
Intel® Quark™ Microcontroller D2000
Platform Design Guide
22
Cap per inch of board (pF) = 3 pF/inch (for the current stackup)
If the nominal trace width is not possible in the breakout area, use 4 mils as
minimum trace width. Choose a stackup so that 50 Ohms will be minimum 4 mils.
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Document Number: 333580-002EN
I²C Interface
November 2016