Programming Serial Flash Devices - Intel Agilex Configuration User Manual

Skew delay includes the following elements:
• The delay due to the differences in board traces lengths on the PCB
• The capacitance loading of the flash device
The table below lists the maximum allowable skew delay depending on the AS_CLK frequency. Intel recommends that you to
perform IBIS simulations to ensure that the skew delay does not exceed the maximum delay specified in this table.
Table 19. Maximum Skew for AS Data Pins in Nanoseconds (ns)
Symbol
T Skew delay for
ext_skew

3.2.6. Programming Serial Flash Devices

You can program serial flash devices in-system using the Intel FPGA Download Cable II or Intel FPGA Ethernet Cable.
You have the following two in-system programming options:
• Active Serial
• JTAG
3.2.6.1. Programming Serial Flash Devices using the AS Interface
When you select AS programming the Intel Quartus Prime software or any supported third-party software programs the
configuration data directly into the serial flash device.
You must set
MSEL
, and
AS_DATA3
header.
Intel ® Agilex ™ Configuration User Guide
60
Description
for the frequency specified
AS_DATA AS_CLK
to JTAG. When is set to JTAG, the SDM tristates the following AS pins:
MSEL
- . The Intel Quartus Prime Programmer programs the flash memory devices via the AS
AS_nCS0 AS_nCS3
3. Intel Agilex Configuration Schemes
Frequency Min Typical
133 MHz —
125 MHz —
115 MHz —
108 MHz —
100 MHz —
<100 MHz —
,
AS_CLK
UG-20205 | 2019.04.03
Max
— 3.60
— 4.00
— 4.20
— 4.60
— 5.0
— 5.0
-
AS_DATA0
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