Block Diagram; Pin Configuration - Hitachi SH7095 Hardware User Manual

12.1.2

Block Diagram

Figure 12.1 is a block diagram of the WDT.
WTCSR: Watchdog timer control/status register
WTCNT: Watchdog timer counter
RSTCSR: Reset control/status register
Note: The internal reset signal can be generated by setting the register. The type of reset can
be selected (power-on or manual resets).
12.1.3

Pin Configuration

Table 12.1 lists the pin configuration.
Table 12.1 Pin Configuration
Pin
Watchdog timer overflow
310 Hitachi
Figure 12.1 WDT Block Diagram
Abbreviation I/O
WDTOVF O
Function
Outputs the counter overflow signal in the
watchdog mode