Hitachi SH7095 Hardware User Manual page 492

Table of Contents

Advertisement

Serial control register (SCR)
Item
7
Bit Name
TIE
Initial Value
0
R/W
R/W
Bit
Bit Name
7
Transmit interrupt
enable (TIE)
6
Receive interrupt enable
(RIE)
5
Transmit enable (TE)
4
Receive enable (RE)
3
Multiprocessor interrupt
enable (MPIE)
2
Transmit-end interrupt
enable (TEIE)
1, 0
Clock enable 1 and 0
(CKE1 and CKE2)
H'FFFFFE02
6
5
RIE
TE
0
0
R/W
R/W
Value
0
Transmit-data-empty interrupt request (TXI) is disabled
(initial value)
1
Transmit-data-empty interrupt request (TXI) is enabled
0
Receive-data-full interrupt (RXI) and receive-error
interrupt (ERI) requests are disabled (initial value)
1
Receive-data-full interrupt (RXI) and receive-error
interrupt (ERI) requests are enabled
0
Transmitter disabled (initial value)
1
Transmitter enabled
0
Receiver disabled (initial value)
1
Receiver enabled
0
Multiprocessor interrupts are disabled (nomal receive
operation) (initial value).
MPE is cleared to 0 when MPIE is cleared to 0, or the
multiprocessor bit (MPB) is set to 1 in receive data.
1
Multiprocessor interrupts are enabled. Receive-data-full
interrupt requests (RXI), receive-error interrupt requests
(ERI), and setting of the RDRF, FER, and ORER status
flags in the serial status register (SSR) are disabled until
the multiprocessor bit is set to 1.
0
Transmit-end interrupt (TEI) requests are disabled (initial
value)
1
Transmit-end interrupt (TEI) requests are enabled
0 0 Asynchronous mode Internal clock, SCK pin used for
Clocked
synchronous mode
0 1 Asynchronous mode Internal clock, SCK pin used for
Clocked
synchronous mode
1 0 Asynchronous mode Internal clock, SCK pin used for
Clocked
synchronous mode
1 1 Asynchronous mode Internal clock, SCK pin used for
Clocked
synchronous mode
8
Bit
4
3
RE
MPIE
0
0
R/W
R/W
Description
input pin (input signal is ignored or
output pin output level is undefined)
Internal clock, SCK pin used for
synchronous clock output
clock output
Internal clock, SCK pin used for
synchronous clock output
clock input
Internal clock, SCK pin used for
synchronous clock input
clock input
Internal clock, SCK pin used for
synchronous clock input
SCI
2
1
TEIE
CKE1
0
0
R/W
R/W
Hitachi 481
0
CKE0
0
R/W

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents