Hitachi SH7095 Hardware User Manual page 502

Table of Contents

Advertisement

Vector number setting register C
(VCRC)
Item
15
14
Bit name
FIC FIC FIC FIC FIC FIC FIC
V6
Initial Value
0
0
R/W
R
R/W R/W R/W R/W R/W R/W R/W
Bit
14 to 8
Free-running timer (FRT) input-
capture interrupt vector number
(FICV6-FICV0)
6 to 0
Free-running timer (FRT) output-
compare interrupt vector number
(FOCV6-FOCV0)
Vector number setting register D
(VCRD)
Item
15
14
Bit name
FOV FOV FOV FOV FOV FOV FOV
V6
Initial Value
0
0
R/W
R
R/W R/W R/W R/W R/W R/W R/W
Bit
14 to 8
Free-running timer (FRT) overflow
interrupt vector number (FOVV6-
FOVV0)
H'FFFFFE66
13
12
11
10
V5
V4
V3
V2
0
0
0
0
Bit nam
H'FFFFFE68
13
12
11
10
V5
V4
V3
V2
0
0
0
0
Bit nam
8/16
Bit
9
8
7
6
FOC FOC FOC FOC FOC FOC FOC
V1
V0
V6
0
0
0
0
R
R/W R/W R/W R/W R/W R/W R/W
These bits set the vector number for the free-running
timer (FRT) input-capture interrupt (ICI).
These bits set the vector number for the free-running
timer (FRT) output-compare interrupt (OCI).
8/16
Bit
9
8
7
6
V1
V0
0
0
0
0
R
R
These bit set the vector number for the free-running
timer(FRT) overflow interrupt (OVI).
INTC
5
4
3
2
V5
V4
V3
V2
0
0
0
0
Description
5
4
3
2
0
0
0
0
R
R
R
R
Description
1
0
V1
V0
0
0
1
0
0
0
R
R
Hitachi 491

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents