Writing - Hitachi SH7095 Hardware User Manual

8.4.2

Writing

This cache is write-through style, and writing to external memory is performed regardless of cache
hit. The write address output to the cache address bus is used to compare to the tag address of the
cache's address array. When they match, the write data output to the cache data bus in the
following cycle is written to the data array. When they do not match, nothing is written to the
cache data array. The write address is output to the internal address bus 1 cycle later than the
cache address bus. The write data is similarly output to the internal data bus 1 cycle later than the
cache data bus. The CPU waits until the writes onto the internal bus are completed.
Figure 8.5 Writing
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