Hitachi SH7095 Hardware User Manual page 506

Watchdog timer counter
(WTCNT)
Item 7
Bit name
Initial Value 0
R/W R/W
Bit
7 to 0 (Count value)
Reset control/status register
(RSTCSR)
BItem 7
Bit name WOVF
Initial Value 0
R/W R/(W)*
Note: Only 0 can be written in bit 7 to clear the flag.
Bit Bit Name
7 Watchdog timer
overflow flag (WOVF)
6 Reset enable (RSTE)
5 Reset select (RSTS)
H'FFFFFE80(write)
H'FFFFFE81(read)
6 5
0 0
R/W R/W
Bit nam
H'FFFFFE82(write)
H'FFFFFE83(read)
6 5
RSTE RSTS
0 0
R/W R/W
Value
0
1
0
1
0
1
16 (write)
8(read)
Bit
4 3
0 0
R/W R/W
Input clock count value
16 (write)
8(read)
Bit
4 3
– –
1 1
– –
No WTCNT overflow in watchdog timer mode
Cleared when software reads WOVF, then writes 0 in
WOVF
Set by WTCNT overflow in watchdog timer mode
Not reset when WTCNT overflows
Reset when WTCNT overflows
Power-on reset
Manual reset
2
0
R/W R/W
Description
2
–
1
–
Description
WDT
1 0
0 0
R/W
1 0
– –
1 1
– –
(initial value)
(initial value)
(initial value)
Hitachi 495