Address Map - Hitachi SH7095 Hardware User Manual

Initialization Procedure: Do not access a space other than CS0 until the settings for the interface
to memory are completed.
Table 7.2 Register Configuration
Name
Bus control register 1
Bus control register 2
Wait control register
Individual memory control register
Refresh timer control/status register RTCSR
Refresh timer counter
Refresh time constant register
Notes: 1. This address is for 32-bit accesses; for 16-bit accesses add 2.
2. 16-bit access is for read only.
7.1.5

Address Map

The SH7095 address map, which has a memory space of 256 Mbytes, is divided into four spaces.
The types and data width of devices that can be connected are specified for each space. The
overall space address map is listed in table 7.3. Since the spaces of the cache area and the cache-
through area are the same, the maximum memory space that can be connected is 128 Mbytes. This
means that when address H'20000000 is accessed in a program, the data accessed is actually in
H'00000000.
There are several spaces for cache control. These include the associative purge space for cache
purges, address array read/write space for reading and writing addresses (address tags), and data
array read/write space for forced reads and writes of data arrays.
122 Hitachi
Abbr. R/W Initial Value Address*
BCR1 R/W H'03F0
BCR2 R/W H'00FC
WCR R/W H'AAFF
MCR R/W H'0000
R/W H'0000
RTCNT R/W H'0000
RTCOR R/W H'0000
1
Access Size
*2
H'FFFFFFE0 16 , 32
*2
H'FFFFFFE4 16 , 32
*2
H'FFFFFFE8 16 , 32
*2
H'FFFFFFEC 16 , 32
*2
H'FFFFFFF0 16 , 32
*2
H'FFFFFFF4 16 , 32
*2
H'FFFFFFF8 16 , 32