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Enables DMA transfer request and auto-request from external pins, on-chip SCI, and on-chip
timers
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Cycle-steal mode or burst mode
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Channel priority level is selectable (fixed mode or round-robin mode)
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Dual or single address transfer mode is selectable
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Transfer data width: 1/2/4/16 bytes
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Address space: 4 Gbytes; maximum transfer counts: 16,777,216
Division Unit (DIVU):
Executes 64 ÷ 32 → 32... 32 and 32 ÷ 32 → 32... 32 divisions
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Overflow interrupt
16-Bit Free Running Timer (FRT) (1 Channel):
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Selects input from three internal/external clocks
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Input capture and output compare
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Counter overflow, compare match, and input capture interrupt
Watchdog Timer (WDT) (1 Channel):
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Watchdog timer or interval timer can be switched
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Count overflow can generate an internal reset, external signal, or interrupt
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Power-on reset or manual reset can be selected as the internal reset
Serial Communication Interface (SCI) (1 Channel):
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Asynchronous or clocked synchronous mode is selectable
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Simultaneous transmit and receive (full duplex)
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On-chip baud rate generator in each channel
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Multiprocessor communication function
Package:
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144-pin plastic QFP (FP-144A)
4 Hitachi
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