Hitachi SH7095 Hardware User Manual page 40

Table 2.10 Instruction Set by Classification (cont)
Classification Types
System 11
control
Total:61
Table 2.11 shows the format for instruction codes, operation, and execution states used in tables
2.12 to 2.17, which list the minimum number of clock cycles required for execution. In practice,
the number of execution cycles increases when the instruction fetch is in contention with data
access or when the destination register of a load instruction (memory → register) is the same as
the register used by the next instruction.
Operation
Code Function
CLRT T bit clear
CLRMAC MAC register clear
LDC Load to control register
LDS Load to system register
NOP No operation
RTE Return from exception processing
SETT T bit set
SLEEP Shift into power-down state
STC Storing control register data
STS Storing system register data
TRAPA Trap exception handling
Number of
Instructions
31
142
Hitachi 29