Hitachi SH7095 Hardware User Manual page 263

Figure 9.18 DACK Output in Ordinary Space Accesses (AM = 0, word access to 8-bit
external device)
Acknowledge Signal Output when External Memory Is Set as Synchronous DRAM: When
external memory is set as synchronous DRAM auto-precharge and AM = 0, the acknowledge
signal is output across the row address, read command, wait and read address of the DMAC read
(figure 9.19). Since the synchronous DRAM read has only bursts, during a single read an invalid
address is output; the acknowledge signal, however, is output on the same timing (figure 9.20). At
this time, the acknowledge signal is extended until the write address is output after the invalid
read. When AM = 1, the acknowledge signal is output across the row address and column address
of the DMAC write (figure 9.21).
Figure 9.19 DACK Output in Synchronous DRAM Burst Read (Auto-precharge, AM = 0)
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