Hitachi SH7095 Hardware User Manual page 354

Table 13.9 Serial Mode Register Settings and SCI Communication Formats
Bit 7
Mode C/A
Asynchronous 0
Asynchronous 0
(multiprocessor
format)
Clocked 1
synchronous
Note: Asterisks (*) in the table indicate don't care bits.
Table 13.10 SMR and SCR Settings and SCI Clock Source Selection
SMR
Bit 7
Mode C/A
Asynchronous 0
mode
Clocked synch- 1
ronous mode
Note: Select the function in combination with the pin function controller (PFC).
SMR Settings
Bit 6 Bit 5 Bit 2
CHR PE MP
0 0 0
1
1 0
1
0 * 1
*
1 *
*
* * *
SCR Settings
Bit 1 Bit 0
CKE1 CKE0 Clock Source SCK Pin Function*
0 0 Internal
1
1 0 External
1
0 0 Internal
1
1 0 External
1
SCI Communication Format
Bit 3 Data Parity
STOP Length Bit
0 8-bit Not set
1
0 Set
1
0 7-bit Not set
1
0 Set
1
0 8-bit Not set
1
0 7-bit
1
* 8-bit Not set
SCI Transmit/Receive Clock
SCI does not use the SCK pin
Outputs a clock with frequency
matching the bit rate
Inputs a clock with frequency 16 times
the bit rate
Outputs the synchronous clock
Inputs the synchronous clock
Multipro- Stop Bit
cessor Bit Length
Not set 1 bit
2 bits
1 bit
2 bits
1 bit
2 bits
1 bit
2 bits
Set 1 bit
2 bits
1 bit
2 bits
Not set None
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