Hitachi SH7095 Hardware User Manual page 366

MPB: Multiprocessor bit
Example: Sending data H'AA to receiving processor A
Figure 13.9 Communication among Processors Using Multiprocessor Format
Communication Formats: Four formats are available. Parity-bit settings are ignored when the
multiprocessor format is selected. For details see table 13.8.
Clock: See the description in the asynchronous mode section.
Transmitting Multiprocessor Serial Data: Figure 13.10 shows a sample flowchart for
transmitting multiprocessor serial data. The procedure for transmitting multiprocessor serial data is
listed below.
1. SCI status check and transmit data write. read the serial status register (SSR), check that the
TDRE bit is 1, then write transmit data in the transmit data register (TDR). Also set MPBT
(multiprocessor bit transfer) to 0 or 1 in SSR. Finally, clear TDRE to 0.
2. To continue transmitting serial data. read the TDRE bit to check whether it is safe to write (if
it reads 1); if so, write data in TDR, then clear TDRE to 0. When the DMAC is started by a
transmit-data-empty interrupt request (TXI) to write data in TDR, the TDRE bit is checked
and cleared automatically.
3. To output a break at the end of serial transmission. set the data register (DR) of the port to 0,
then clear TE to 0 in SCR and set the TxD pin function as output port with the PFC.
Hitachi 355